On the performance of STDMA Link Scheduling and Switched Beamforming Antennas in Wireless Mesh Networks

Projecte final de carrera realitzat en col.laboració amb King's College LondonWireless Mesh Networks (WMNs) aim to revolutionize Internet connectivity due to its high throughput, cost-e ectiveness and ease deployment by providing last mile connectivity and/or backhaul support to di erent cellular networks. In order not to jeopardize their successful deployment, several key issues must be investigated and overcome to fully realize its potential. For WMNs that utilize Spatial Reuse TDMA as the medium access control, link scheduling still requires further enhancements. The rst main contribution of this thesis is a fast randomized parallel link swap based packing (RSP) algorithm for timeslot allocation in a spatial time division multiple access (STDMA) wireless mesh network. The proposed randomized algorithm extends several greedy scheduling algorithms that utilize the physical interference model by applying a local search that leads to a substantial improvement in the spatial timeslot reuse. Numerical simulations reveal that compared to previously scheduling schemes the proposed randomized algorithm can achieve a performance gain of up to 11%. A signi cant bene t of the proposed scheme is that the computations can be parallelized and therefore can e ciently utilize commoditized and emerging multi-core and/or multi-CPU processors. Furthermore, the use of selectable multi-beam directional antennas in WMNs, such as beam switched phase array antennas, can assist to signi cantly enhance the overall reuse of timeslots by reducing interference levels across the network and thereby increasing the spectral e ciency of the system. To perform though a switch on the antenna beam it may require up to 0.25 ms in practical deployed networks, while at the same time very frequent beam switchings can a ect frame acquisition and overall reliability of the deployed mesh network. The second key contribution of this thesis is a set of algorithms that minimize the overall number of required beam switchings in the mesh network without penalizing the spatial reuse of timeslots, i.e., keeping the same overall frame length in the network. Numerical investigations reveal that the proposed set of algorithms can reduce the number of beam switchings by almost 90% without a ecting the frame length of the network

Coupled mantle dripping and lateral dragging controlling the lithosphere structure of the NW-Moroccan margin and the Atlas Mountains: A numerical experiment

Recent studies integrating gravity, geoid, surface heat flow, elevation and seismic data indicate a prominent lithospheric mantle thickening beneath the NW-Moroccan margin (LAB >200 km-depth) followed by thinning beneath the Atlas Domain (LAB about 80 km-depth). Such unusual configuration has been explained by the combination of mantle underthrusting due to oblique Africa-Eurasia convergence together with viscous dripping fed by asymmetric lateral mantle dragging, requiring a strong crust-mantle decoupling. In the present work we examine the physical conditions under which the proposed asymmetric mantle drip and drag mechanism can reproduce this lithospheric configuration. We also analyse the influence of varying the kinematic boundary conditions as well as the mantle viscosity and the initial lithosphere geometry. Results indicate that the proposed drip-drag mechanism is dynamically feasible and only requires a lateral variation of the lithospheric strength. The further evolution of the gravitational instability can become either in convective removal of the lithospheric mantle, mantle delamination, or subduction initiation. The model reproduces the main trends of the present-day lithospheric geometry across the NW-Moroccan margin and the Atlas Mountains, the characteristic time of the observed vertical movements, the amplitude and rates of uplift in the Atlas Mountains and offers an explanation to the Miocene to Pliocene volcanism. An abnormal constant tectonic subsidence rate in the margin is predicted. (C) 2013 Elsevier B.V. All rights reserved.Peer ReviewedPostprint (author's final draft

mdendro: An R package for extended agglomerative hierarchical clustering

"mdendro" is an R package that provides a comprehensive collection of linkage methods for agglomerative hierarchical clustering on a matrix of proximity data (distances or similarities), returning a multifurcated dendrogram or multidendrogram. Multidendrograms can group more than two clusters at the same time, solving the nonuniqueness problem that arises when there are ties in the data. This problem causes that different binary dendrograms are possible depending both on the order of the input data and on the criterion used to break ties. Weighted and unweighted versions of the most common linkage methods are included in the package, which also implements two parametric linkage methods. In addition, package "mdendro" provides five descriptive measures to analyze the resulting dendrograms: cophenetic correlation coefficient, space distortion ratio, agglomerative coefficient, chaining coefficient and tree balance.Comment: 24 pages, 11 figures. Software available at CRAN (https://cran.r-project.org/package=mdendro) and Github (https://sergio-gomez.github.io/mdendro/

The Singular Perturbation Problem for a Class of Generalized Logistic Equations Under Non-classical Mixed Boundary Conditions

This paper studies a singular perturbation result for a class of generalized diffusive logistic equa- tions, dLu = uh(u, x), under non-classical mixed boundary conditions, Bu = 0 on ∂Ω. Most of the precursors of this result dealt with Dirichlet boundary conditions and self-adjoint second order elliptic operators. To over- come the new technical difficulties originated by the generality of the new setting, we have characterized the regularity of ∂Ω through the regularity of the associated conormal projections and conormal distances. This seems to be a new result of a huge relevance on its own. It actually complements some classical findings of Serrin, Gilbarg and Trudinger, Krantz and Parks, Foote, and Li and Nirenberg concerning the regularity of the inner distance function to the boundary

On the performance of STDMA Link Scheduling and Switched Beamforming Antennas in Wireless Mesh Networks

Projecte final de carrera realitzat en col.laboració amb King's College LondonWireless Mesh Networks (WMNs) aim to revolutionize Internet connectivity due to its high throughput, cost-e ectiveness and ease deployment by providing last mile connectivity and/or backhaul support to di erent cellular networks. In order not to jeopardize their successful deployment, several key issues must be investigated and overcome to fully realize its potential. For WMNs that utilize Spatial Reuse TDMA as the medium access control, link scheduling still requires further enhancements. The rst main contribution of this thesis is a fast randomized parallel link swap based packing (RSP) algorithm for timeslot allocation in a spatial time division multiple access (STDMA) wireless mesh network. The proposed randomized algorithm extends several greedy scheduling algorithms that utilize the physical interference model by applying a local search that leads to a substantial improvement in the spatial timeslot reuse. Numerical simulations reveal that compared to previously scheduling schemes the proposed randomized algorithm can achieve a performance gain of up to 11%. A signi cant bene t of the proposed scheme is that the computations can be parallelized and therefore can e ciently utilize commoditized and emerging multi-core and/or multi-CPU processors. Furthermore, the use of selectable multi-beam directional antennas in WMNs, such as beam switched phase array antennas, can assist to signi cantly enhance the overall reuse of timeslots by reducing interference levels across the network and thereby increasing the spectral e ciency of the system. To perform though a switch on the antenna beam it may require up to 0.25 ms in practical deployed networks, while at the same time very frequent beam switchings can a ect frame acquisition and overall reliability of the deployed mesh network. The second key contribution of this thesis is a set of algorithms that minimize the overall number of required beam switchings in the mesh network without penalizing the spatial reuse of timeslots, i.e., keeping the same overall frame length in the network. Numerical investigations reveal that the proposed set of algorithms can reduce the number of beam switchings by almost 90% without a ecting the frame length of the network

Portfolio selection using neural networks

In this paper we apply a heuristic method based on artificial neural networks in order to trace out the efficient frontier associated to the portfolio selection problem. We consider a generalization of the standard Markowitz mean-variance model which includes cardinality and bounding constraints. These constraints ensure the investment in a given number of different assets and limit the amount of capital to be invested in each asset. We present some experimental results obtained with the neural network heuristic and we compare them to those obtained with three previous heuristic methods.Comment: 12 pages; submitted to "Computers & Operations Research

Regular cell design approach considering lithography-induced process variations

The deployment delays for EUVL, forces IC design to continue using 193nm wavelength lithography with innovative and costly techniques in order to faithfully print sub-wavelength features and combat lithography induced process variations. The effect of the lithography gap in current and upcoming technologies is to cause severe distortions due to optical diffraction in the printed patterns and thus degrading manufacturing yield. Therefore, a paradigm shift in layout design is mandatory towards more regular litho-friendly cell designs in order to improve line pattern resolution. However, it is still unclear the amount of layout regularity that can be introduced and how to measure the benefits and weaknesses of regular layouts. This dissertation is focused on searching the degree of layout regularity necessary to combat lithography variability and outperform the layout quality of a design. The main contributions that have been addressed to accomplish this objective are: (1) the definition of several layout design guidelines to mitigate lithography variability; (2) the proposal of a parametric yield estimation model to evaluate the lithography impact on layout design; (3) the development of a global Layout Quality Metric (LQM) including a Regularity Metric (RM) to capture the degree of layout regularity of a layout implementation and; (4) the creation of different layout architectures exploiting the benefits of layout regularity to outperform line-pattern resolution, referred as Adaptive Lithography Aware Regular Cell Designs (ALARCs). The first part of this thesis provides several regular layout design guidelines derived from lithography simulations so that several important lithography related variation sources are minimized. Moreover, a design level methodology, referred as gate biasing, is proposed to overcome systematic layout dependent variations, across-field variations and the non-rectilinear gate effect (NRG) applied to regular fabrics by properly configuring the drawn transistor channel length. The second part of this dissertation proposes a lithography yield estimation model to predict the amount of lithography distortion expected in a printed layout due to lithography hotspots with a reduced set of lithography simulations. An efficient lithography hotspot framework to identify the different layout pattern configurations, simplify them to ease the pattern analysis and classify them according to the lithography degradation predicted using lithography simulations is presented. The yield model is calibrated with delay measurements of a reduced set of identical test circuits implemented in a CMOS 40nm technology and thus actual silicon data is utilized to obtain a more realistic yield estimation. The third part of this thesis presents a configurable Layout Quality Metric (LQM) that considering several layout aspects provides a global evaluation of a layout design with a single score. The LQM can be leveraged by assigning different weights to each evaluation metric or by modifying the parameters under analysis. The LQM is here configured following two different set of partial metrics. Note that the LQM provides a regularity metric (RM) in order to capture the degree of layout regularity applied in a layout design. Lastly, this thesis presents different ALARC designs for a 40nm technology using different degrees of layout regularity and different area overheads. The quality of the gridded regular templates is demonstrated by automatically creating a library containing 266 cells including combinational and sequential cells and synthesizing several ITC'99 benchmark circuits. Note that the regular cell libraries only presents a 9\% area penalty compared to the 2D standard cell designs used for comparison and thus providing area competitive designs. The layout evaluation of benchmark circuits considering the LQM shows that regular layouts can outperform other 2D standard cell designs depending on the layout implementation.Los continuos retrasos en la implementación de la EUVL, fuerzan que el diseño de IC se realice mediante litografía de longitud de onda de 193 nm con innovadoras y costosas técnicas para poder combatir variaciones de proceso de litografía. La gran diferencia entre la longitud de onda y el tamaño de los patrones causa severas distorsiones debido a la difracción óptica en los patrones impresos y por lo tanto degradando el yield. En consecuencia, es necesario realizar un cambio en el diseño de layouts hacia diseños más regulares para poder mejorar la resolución de los patrones. Sin embargo, todavía no está claro el grado de regularidad que se debe introducir y como medir los beneficios y los perjuicios de los diseños regulares. El objetivo de esta tesis es buscar el grado de regularidad necesario para combatir las variaciones de litografía y mejorar la calidad del layout de un diseño. Las principales contribuciones para conseguirlo son: (1) la definición de diversas reglas de diseño de layout para mitigar las variaciones de litografía; (2) la propuesta de un modelo para estimar el yield paramétrico y así evaluar el impacto de la litografía en el diseño de layout; (3) el diseño de una métrica para analizar la calidad de un layout (LQM) incluyendo una métrica para capturar el grado de regularidad de un diseño (RM) y; (4) la creación de diferentes tipos de layout explotando los beneficios de la regularidad, referidos como Adaptative Lithography Aware Regular Cell Designs (ALARCs). La primera parte de la tesis, propone las diversas reglas de diseño para layouts regulares derivadas de simulaciones de litografía de tal manera que las fuentes de variación de litografía son minimizadas. Además, se propone una metodología de diseño para layouts regulares, referida como "gate biasing" para contrarrestar las variaciones sistemáticas dependientes del layout, las variaciones en la ventana de proceso del sistema litográfico y el efecto de puerta no rectilínea para configurar la longitud del canal del transistor correctamente. La segunda parte de la tesis, detalla el modelo de estimación del yield de litografía para predecir mediante un número reducido de simulaciones de litografía la cantidad de distorsión que se espera en un layout impreso debida a "hotspots". Se propone una eficiente metodología que identifica los distintos patrones de un layout, los simplifica para facilitar el análisis de los patrones y los clasifica en relación a la degradación predecida mediante simulaciones de litografía. El modelo de yield se calibra utilizando medidas de tiempo de un número reducido de idénticos circuitos de test implementados en una tecnología CMOS de 40nm y de esta manera, se utilizan datos de silicio para obtener una estimación realista del yield. La tercera parte de este trabajo, presenta una métrica para medir la calidad del layout (LQM), que considera diversos aspectos para dar una evaluación global de un diseño mediante un único valor. La LQM puede ajustarse mediante la asignación de diferentes pesos para cada métrica de evaluación o modificando los parámetros analizados. La LQM se configura mediante dos conjuntos de medidas diferentes. Además, ésta incluye una métrica de regularidad (RM) para capturar el grado de regularidad que se aplica en un diseño. Finalmente, esta disertación presenta los distintos diseños ALARC para una tecnología de 40nm utilizando diversos grados de regularidad y diferentes impactos en área. La calidad de estos diseños se demuestra creando automáticamente una librería de 266 celdas incluyendo celdas combinacionales y secuenciales y, sintetizando diversos circuitos ITC'99. Las librerías regulares solo presentan un 9% de impacto en área comparado con diseños de celdas estándar 2D y por tanto proponiendo diseños competitivos en área. La evaluación de los circuitos considerando la LQM muestra que los diseños regulares pueden mejorar otros diseños 2D dependiendo de la implementación del layout

El que lee mucho y anda mucho, ve mucho y sabe mucho

Premio extraordinario de Trabajo Fin de Máster curso 2020/2021. Máster en Profesorado de Enseñanza Secundaria Obligatoria, Bachillerato, Formación Profesional y Enseñanza de Idioma